Bài thực hành số 3 mạch ghép kênh và mạch phân kênh | Bài tập môn Mạch điện tử Trường đại học sư phạm kỹ thuật TP. Hồ Chí Minh
3.1. Mục tiêu: Sau khi hoàn thành bài thí nghiệm này, SV có thể: Sử dụng được bộ ghép kênh để tạo bộ so sánh và một bộ phát chẵn lẻ trong truyền số liệu; Thiết kế mạch được logic tổ hợp nhiều kênh ra sử dụng bộ phân kênh; Sử dụng được máy hiện sóng để phát triển một biểu đồ thời gian đối với mạch giải mã bộ đếm. Tài liệu giúp bạn tham khảo, ôn tập và đạt kết quả cao. Mời bạn đọc đón xem!
Môn: Mạch điện tử 1
Trường: Đại học Sư phạm Kỹ thuật Thành phố Hồ Chí Minh
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BÀI THỰC HÀNH SỐ 3
MẠCH GHÉP KÊNH VÀ MẠCH PHÂN KÊNH 3.1. Mục tiêu
Sau khi hoàn thành bài thí nghiệm này, SV có thể:
Sử dụng được bộ ghép kênh để tạo bộ so sánh và một bộ phát chẵn lẻ trong truyền số liệu;
Thiết kế mạch được logic tổ hợp nhiều kênh ra sử dụng bộ phân kênh;
Sử dụng được máy hiện sóng để phát triển một biểu đồ thời gian đối
với mạch giải mã bộ đếm.
3.2. Câu hỏi chuẩn bị
Trước khi vào bài thực hành, Sinh viên cần chuẩn bị và trả lời các câu hỏi sau đây:
1/ Hãy cho biết bảng trạng thái – phương trình – sơ đồ mạch ghép kênh 4 kênh vào.
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2/ Hãy cho biết sơ đồ mạch mở rông gồm 2 bộ ghép kênh 4 kênh vào.
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3/ Hãy cho biết bảng trạng thái – phương trình – sơ đồ mạch phân kênh 4 kênh ra.
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4/ Hãy cho biết sơ đồ mạch mở rộng gồm 2 bộ phân kênh 4 kênh ra.
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3.3. Trang thiết bị thực hành
IC 74151A; IC 74139A; IC 7404; IC 7408; IC 7474; IC 7432; IC
7486; LED; DIP; Test board; R 330 Ω; R 1 kΩ. Bộ KIT thực tập. Dao động ký; VOM.
Máy tính có phần mềm Proteus.
3.4. Tóm tắt lý thuyết
Bộ ghép kênh hoặc bộ đa hợp dữ liệu kết nối bất kỳ kênh nào của
nhiều kênh vào cho ra một kênh duy nhất. Ngược lại, một kênh vào duy
nhất được chuyển hướng đến một trong nhiều kênh ra, được gọi là bộ phân
kênh hoặc bộ giải đa hợp. Các định nghĩa này được minh họa trong hình
2.1. Sự lựa chọn được xác định bằng tổ hợp logic các tín hiệu được gọi là
ngõ vào lựa chọn (địa chỉ).
Hình 3.1: Sơ đồ ghép kênh – phân kênh. 3.4.1. IC ghép kênh 74151A
Sơ đồ chân – ký hiệu và bảng chức năng của IC ghép kênh 8 kênh vào.
Hình 3.2: Sơ đồ chân-ký hiệu IC 74151A.
Bảng 3.1: Bảng chức năng IC 74151A 3.4.2 IC phân kênh 74139A
Sơ đồ chân – ký hiệu và bảng chức năng của IC phân kênh 4 kênh ra 74139A.
Hình 3.3: Sơ đồ chân - ký hiệu IC 74139A.
Bảng 2.2: Bảng chức năng IC 74139A
3.5. Các bước thực tập
3.5.1 So sánh số nhị phân 2 bit
So sánh hai số 2-bit như hình 2.4 được gọi là A và B để tìm xem A
bằng hoặc lớn hơn B. Sử dụng bộ so sánh và OR các đầu ra A> B và A =
B. Một công nghệ khác là sử dụng MUX 8: 1 với phương pháp được thực
hiện trong bài này. Các đầu vào là A ,2 Al và B ,2 B 1đại diện cho hai số
được so sánh. Lưu ý rằng các bit A2, A 1và B 2được kết nối với các đầu
vào SELECT của MUX. B bit có sẵn có thể được kết nối khi cần thiết. 1
Hình 3.4: Mạch so sánh hai số nhị phân 2 bit.
3.5.2. Mạch phát chẵn lẻ
Kỹ thuật thực hiện một hàm tùy ý cũng có thể tạo ra chẵn hoặc lẻ.
MUX có thể tạo ra cả chẵn và lẻ parity cùng một lúc vì có hai đầu lấy từ
đầu ra Y của 74151A. Đầu ra W\ sẽ thấp khi Y ở mức cao và đèn LED
sáng. Hoàn thành mạch cho bộ tạo chẵn lẻ được cho trong hình 2.5.
Hình 3.5: Mạch phát chẵn lẻ.
2.5.3 Mạch điều khiển đèn giao thông
Bảng trạng thái được sắp xếp theo mã Gray được sử dụng bởi logic
tuần tự để chuyển qua các trạng thái.
Bảng 3.3: Bảng trạng thái mạch đèn giao thông
Hình 3.6: Mạch điều khiển đèn giao thông.
3.5.4 Mạch tổ hợp dùng phân kênh
Hình 2-7 cho thấy bộ giải mã 74LS139 và cổng XOR. Đối với mạch này,
trong những điều kiện nào đèn LED sẽ được BẬT? (Gợi ý: Đối với 8 tổ hợp
công tắc đầu vào, năm công tắc sẽ sáng đèn LED.)
Hình 3.7: Mạch tổ hợp dùng phân kênh.
3.6. Báo cáo thực tập 3.6.1 Hoàn thành bảng sau
3.6.2 Hoàn thành và giải thích mạch trong hình 3.4
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................................................................................................................................................................................................................................................................................ 3.6.3 Hoàn thành bảng sau
3.6.4 Hoàn thành và giải thích mạch trong hình 3.5
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3.6.5 Hoàn thành và giải thích mạch trong hình 3.6
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3.6.6 Giải thích mạch trong hình 3.7
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................................................................................................................................................................................................................................................................................ 2.7 Bài tập
1. Thiết kế bộ mạch phát hiện mã BCD không hợp lệ bằng 74151 A.
2. Một mạch ghép kênh có n ngõ lựa chọn thì có bao nhiêu kênh vào?
3. Một mạch ghép kênh có n kênh vào thì có bao nhiêu ngõ lựa chọn?
4. Hãy tra sổ tay cho biết IC có chức năng Demultiplexer.
5. Hãy thiết kế mạch ghép kênh 32 kênh vào từ các IC đã học.
6. Giả sử bạn cần một bộ phân kênh 8 kênh, nhưng tất cả những gì có sẵn
là 74LS139A kép. Chỉ ra cách bạn có thể sử dụng nó cùng với bộ đảo để
tạo thành bộ phân kênh 8 kênh ra.